Things I learned while building and testing a PDP11V2 board. Most of these are things that could be fixed by editing the web page. "We now need to add the input address line buffers (U30, U37 and U36) as inputs to this U25 CPLD. These chips must be soldered directly to the board (under the CPU and UART chips). It is critical you are sure these buffers are OK. If possible pull chips from another working board, just to be sure." Actually, U36 can be socketed. "P20 pin 3 to P4 pin 2." P19 & P20 are RIGHT TO LEFT so: P20 1-2 DAL0 <- 1 P20 3-4 DAL1 <- 1 P20-3 to P19-3 DAL2 <- 0 P20 7-8 DAL3 <- 1 (The PHOTO is OK. But the reference to P4 pin 2 is incorrect.) "P4 pins, 1-2 and 3-4. P3 pins, 5-6, 7-8, 8-10, 11-12, 13-14." P4-2 to P3-1 DAL8 <- 0 P4-4 to P3-2 DAL9 <- 0 P4-6 to P3-3 DAL10 <- 0 P4-8 to P3-4 DAL11 <- 0 P4-10 to P3-5 DAL12 <- 0 P4-13 to P4-14 DAL14 <- 1 P4-15 to P4-16 DAL15 <- 1 "Add U3, U19, IC1, U21, U5, U33, U34, U36 and U18. Jumper P10 1-2 and K5 1-2. Add K14, 2-3 (assuming no Support Board currently). In your Z80 monitor use the "O" command (or however in your system you pass control over to an S100 bus slave device), check that that jumper pin P10 1-2 goes from LOW to HIGH. Hit reset, it should flip back to LOW. " P10 1-2 starts HIGH, and goes LOW on O (or W) command. On reset it goes back HIGH. "Add the 20MHz Oscillator P18. Jumper JP9. Add jumper K11 1-2 and K7 1-2. Jumper P8 1-2 (top two pins) and K6 2-3 (right two pins). Now with the "O" command the LED D1 "ROM Active" should light up as well as LED D3 "PDP Active". (The others are undefined). " D2 will be lit (LOW_PAGE), not D1. (the CPLD does not actually drive D1, though it is available for such use. The Bill of Materials lists SW1 as a toggle switch. Instead it is a subminiature pushbutton. JP15 is mislabeled on the schematic as a pullup for pHLDA. It is actually a pullup for PHANTOM* . " Reading RAM at 140000 (D000H) should show something like this" 140000 correspondes to 0xC000 not 0xD000. The CPLD code in U25 for switching back IN the monitor ROM does not work from the PDP-11 side, due to the term: S100_LA15_13 "Solder the chip directly to the board. Also add U41. Here is a picture of the arrangement." This should also mention changing K1 from 1-2 to 2-3. The Monitor ROM switch to Z80 will not work without the SMB. It might help to add code to read port 0xE0E3. Suggestions One can also make several tests of U25 using PDP-11 Console ODT before engaging the monitor rom: Reading port Will 17760343 (E0E3) Switch back to Z80 17760344 (E0E4) Switch on HIGH Rom page (LED should go OUT) 17760345 (E0E5) Switch on LOW ROM Page (LED should go on) 17760341 (E0E1) Disable the on-board ROM (exposing underlying RAM) Note: 17760342 (E0E2) Re-enable the on-board ROM does NOT work as mentioned above.