Overlapped Tape I\/O is generally working OK now. Getting that to work involved two things.<\/p>\n\n\n\n
Firstly, I needed a delay corresponding to the tape inter-record gap time (though not nearly that long) so that the several instructions that the diagnostic runs through before it tests for an overlapped condition would occur while an I\/O Overlap still in progress. This fixed the error stop problem. Fortunately, that was much easier to find and fix than I had expected.<\/p>\n\n\n\n
After fixing that problem, overlapped reads worked correctly, but overlapped writes had a problem – they somtimes dddduplicated characters \ud83d\ude09 – resulting in records longer than they should have been (and with incorrect contents). <\/p>\n\n\n\n
The latter turned out to be more or less self inflicted. In August of 2023, I encountered some issues with the Store A Address Register (SAR) instruction. To fix that I used the +S ADDR MOD SET TO ZERO signal to inhibit resetting the modify by zero address modifier control latch, reasoning that latches don’t respond well to having simultaneous set and reset signals active at the same time. <\/p>\n\n\n\n
The post relating to that change is available at: In this case, however, that was causing the Modify by Zero Address Latch to not reset at times when it needed to, which then sometimes inhibited the Modify by +1 Address Latch from setting, causing the address for the I\/O to not increment properly. <\/p>\n\n\n\n The fix was to modify the ALD that generates the address modificatio signals, ALD 14.71.41.1 ADDRESS MODIFIER CONTROLS to inhibit generation of the +S ADDR MOD SET TO ZERO signal in the presence of +S ADDR MOD SET TO PLUS ONE. For now, that was done directly in the VHDL. To fix it in the ALD I would need to add a couple of “phantom” gates.<\/p>\n\n\n\n The wrong length record issues when writing for locations ending at the end of memory remain, as does Error 17 involving the timing of longer inter-record gaps expected from a tape Erase call, and some other errors involving the 2nd channel (tape marks? backspaces?) still remain.<\/p>\n","protected":false},"excerpt":{"rendered":" Overlapped Tape I\/O is generally working OK now. Getting that to work involved two things. Firstly, I needed a delay corresponding to the tape inter-record gap time (though not nearly that long) so that the several instructions that the diagnostic runs through before it tests for an overlapped condition would occur while an I\/O Overlap … Continue reading “IBM 1410 FPGA: Overlapped I\/O Fix”<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[6,5,15],"tags":[16],"post_folder":[],"class_list":["post-1716","post","type-post","status-publish","format-standard","hentry","category-collection","category-computers","category-ibm1410","tag-ibm1410-2"],"_links":{"self":[{"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/posts\/1716","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/comments?post=1716"}],"version-history":[{"count":1,"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/posts\/1716\/revisions"}],"predecessor-version":[{"id":1717,"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/posts\/1716\/revisions\/1717"}],"wp:attachment":[{"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/media?parent=1716"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/categories?post=1716"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/tags?post=1716"},{"taxonomy":"post_folder","embeddable":true,"href":"https:\/\/www.computercollection.net\/index.php\/wp-json\/wp\/v2\/post_folder?post=1716"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}
https:\/\/www.computercollection.net\/index.php\/2023\/08\/03\/ibm-1410-fpga-smore-sar-instruction-issues\/<\/a><\/p>\n\n\n\n